FPGA Verification Engineer

Piper Companies is looking for a FPGA Verification Engineer to work onsite in San Jose, CA five days per week . The ideal FPGA Verification Engineer will ensure the integrity and functionality of a digital design environment for FPGA design using Verilog and UVM.

Responsibilities for FPGA Verification Engineer:

• Develop and implement object-oriented testbench infrastructure, including BFMs and test cases, using UVM.
• Collaborate closely with RTL designers to debug and resolve design issues.
• Independently create comprehensive test plans, develop test sequences, and generate stimuli.
• Utilize industry-standard tools and scripting languages to enhance verification processes.

Qualifications for FPGA Verification Engineer:

• 5-8 years of verification experience in FPGA and ASIC environments.
• Must be eligible to work in the United States and obtain and maintain an Active U.S. Government Secret Clearance.
• Proficiency in SystemVerilog with a solid grasp of object-oriented programming principles.
• Proven experience in developing object-oriented testbench infrastructure, Bus Functional Models (BFMs), and test cases using UVM
• A Bachelor's degree in Electrical Engineering is required. Master's degree preferred.

Compensation for the FPGA Verification Engineer:

• Pay: $75.00 - $79.00 per hour depending on experience
• Comprehensive benefit package; Medical, Dental, Vision, 401k match plus PTO, Sick leave as required by law, and Paid Holidays

This job opens for applications on 3/20/2025. Applications for this job will be accepted for at least 30 days from the posting date.

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